1. Technical Field
The present invention relates to a system and method for verifying critical path coverage of post-silicon software validation tools. More particularly, the present invention relates to a system and method for modifying a simulation model and optimizing an application program to identify valid “hardware-identified operating conditions” that are matched with “simulator-identified operating conditions” in order to enhance a simulator's accuracy.
2. Description of the Related Art
Current post-silicon pseudo-random software validation tools are primarily used for functional verification. Due to their random nature and their ability to exercise many areas of the microprocessor, they may also be used for product characterization. One aspect of a microprocessor design that affects its characterization is the design's critical timing paths, which may lead to issues such as race conditions.
Existing art provides a few approaches for verifying critical paths, such as LBIST (Logic Built In Self Test) and test pattern usage on a manufacturing tester. A challenge found with LBIST, however, is that LBIST is not truly random and has limited critical path coverage based upon the amount of time that the LBIST executes. A challenge found with executing test patterns on a manufacturing tester is that the critical paths are targeted with a specific verified pattern, which does not produce a real-life operational environment and, therefore, does not account for issues such as transient power characteristics.
What is needed, therefore, is a system and method for verifying critical path coverage of post-silicon validation tools based upon a real-life environment.